// Copyright (C) 1953-2022 NUDT
// Verilog module name - dmac_lookup
// Version: V3.4.0.20220225
// Created:
//         by - fenglin 
////////////////////////////////////////////////////////////////////////////
// Description:
//         lookup dmac forward table.
///////////////////////////////////////////////////////////////////////////


module dmac_lookup
(
        i_clk                           ,
        i_rst_n                         ,
        
        iv_fifo_rdata                   ,
        i_fifo_empty                    ,
		o_fifo_rd                       ,
        
        o_tsmp_lookup_table_key_wr      ,
        ov_tsmp_lookup_table_key        ,
        iv_tsmp_lookup_table_outport    ,
        i_tsmp_lookup_table_outport_wr  ,
        
        o_dmacram_rd                    ,
        ov_dmacram_raddr                ,
        iv_dmacram_rdata                ,
                                        
        ov_md                           ,
        o_md_wr                         ,
		
        iv_broadcast_storm_prevent_outport       ,
        
        i_hit_cnt_clr    ,
                       
        ov_entry0_hit_cnt,
        ov_entry1_hit_cnt,
        ov_entry2_hit_cnt,
        ov_entry3_hit_cnt,
        ov_entry4_hit_cnt,
        ov_entry5_hit_cnt,
        ov_entry6_hit_cnt,
        ov_entry7_hit_cnt , 
        ov_entry8_hit_cnt ,
        ov_entry9_hit_cnt ,
        ov_entry10_hit_cnt,
        ov_entry11_hit_cnt,
        ov_entry12_hit_cnt,
        ov_entry13_hit_cnt,
        ov_entry14_hit_cnt,
        ov_entry15_hit_cnt,
        ov_entry16_hit_cnt,
        ov_entry17_hit_cnt,
        ov_entry18_hit_cnt,
        ov_entry19_hit_cnt,
        ov_entry20_hit_cnt,
        ov_entry21_hit_cnt,
        ov_entry22_hit_cnt,
        ov_entry23_hit_cnt,
        ov_entry24_hit_cnt,
        ov_entry25_hit_cnt,
        ov_entry26_hit_cnt,
        ov_entry27_hit_cnt,
        ov_entry28_hit_cnt,
        ov_entry29_hit_cnt,
        ov_entry30_hit_cnt,
        ov_entry31_hit_cnt,
        ov_entry32_hit_cnt,
        ov_entry33_hit_cnt,
        ov_entry34_hit_cnt,
        ov_entry35_hit_cnt,
        ov_entry36_hit_cnt,
        ov_entry37_hit_cnt,
        ov_entry38_hit_cnt,
        ov_entry39_hit_cnt,
        ov_entry40_hit_cnt,
        ov_entry41_hit_cnt,
        ov_entry42_hit_cnt,
        ov_entry43_hit_cnt,
        ov_entry44_hit_cnt,
        ov_entry45_hit_cnt,
        ov_entry46_hit_cnt,
        ov_entry47_hit_cnt,
        ov_entry48_hit_cnt,
        ov_entry49_hit_cnt,
        ov_entry50_hit_cnt,
        ov_entry51_hit_cnt,
        ov_entry52_hit_cnt,
        ov_entry53_hit_cnt,
        ov_entry54_hit_cnt,
        ov_entry55_hit_cnt,
        ov_entry56_hit_cnt,
        ov_entry57_hit_cnt,
        ov_entry58_hit_cnt,
        ov_entry59_hit_cnt,
        ov_entry60_hit_cnt,
        ov_entry61_hit_cnt,
        ov_entry62_hit_cnt,
        ov_entry63_hit_cnt
   
);
// I/O
// clk & rst  
input               i_clk;
input               i_rst_n;
//
input       [299:0] iv_fifo_rdata;
input               i_fifo_empty;
output reg          o_fifo_rd;
//read ram
output reg          o_tsmp_lookup_table_key_wr;
output reg  [47:0]  ov_tsmp_lookup_table_key;
input       [32:0]  iv_tsmp_lookup_table_outport;
input               i_tsmp_lookup_table_outport_wr;

output reg          o_dmacram_rd;
output reg  [5:0]   ov_dmacram_raddr;
input       [81:0]  iv_dmacram_rdata;
//output 
output reg  [299:0] ov_md;
output reg          o_md_wr;

input       [32:0]  iv_broadcast_storm_prevent_outport;

input               i_hit_cnt_clr;

output reg  [15:0]  ov_entry0_hit_cnt;
output reg  [15:0]  ov_entry1_hit_cnt;
output reg  [15:0]  ov_entry2_hit_cnt;
output reg  [15:0]  ov_entry3_hit_cnt;
output reg  [15:0]  ov_entry4_hit_cnt;
output reg  [15:0]  ov_entry5_hit_cnt;
output reg  [15:0]  ov_entry6_hit_cnt;
output reg  [15:0]  ov_entry7_hit_cnt;
output reg  [15:0]  ov_entry8_hit_cnt ;
output reg  [15:0]  ov_entry9_hit_cnt ;
output reg  [15:0]  ov_entry10_hit_cnt;
output reg  [15:0]  ov_entry11_hit_cnt;
output reg  [15:0]  ov_entry12_hit_cnt;
output reg  [15:0]  ov_entry13_hit_cnt;
output reg  [15:0]  ov_entry14_hit_cnt;
output reg  [15:0]  ov_entry15_hit_cnt;
output reg  [15:0]  ov_entry16_hit_cnt;
output reg  [15:0]  ov_entry17_hit_cnt;
output reg  [15:0]  ov_entry18_hit_cnt;
output reg  [15:0]  ov_entry19_hit_cnt;
output reg  [15:0]  ov_entry20_hit_cnt;
output reg  [15:0]  ov_entry21_hit_cnt;
output reg  [15:0]  ov_entry22_hit_cnt;
output reg  [15:0]  ov_entry23_hit_cnt;
output reg  [15:0]  ov_entry24_hit_cnt;
output reg  [15:0]  ov_entry25_hit_cnt;
output reg  [15:0]  ov_entry26_hit_cnt;
output reg  [15:0]  ov_entry27_hit_cnt;
output reg  [15:0]  ov_entry28_hit_cnt;
output reg  [15:0]  ov_entry29_hit_cnt;
output reg  [15:0]  ov_entry30_hit_cnt;
output reg  [15:0]  ov_entry31_hit_cnt;
output reg  [15:0]  ov_entry32_hit_cnt;
output reg  [15:0]  ov_entry33_hit_cnt;
output reg  [15:0]  ov_entry34_hit_cnt;
output reg  [15:0]  ov_entry35_hit_cnt;
output reg  [15:0]  ov_entry36_hit_cnt;
output reg  [15:0]  ov_entry37_hit_cnt;
output reg  [15:0]  ov_entry38_hit_cnt;
output reg  [15:0]  ov_entry39_hit_cnt;
output reg  [15:0]  ov_entry40_hit_cnt;
output reg  [15:0]  ov_entry41_hit_cnt;
output reg  [15:0]  ov_entry42_hit_cnt;
output reg  [15:0]  ov_entry43_hit_cnt;
output reg  [15:0]  ov_entry44_hit_cnt;
output reg  [15:0]  ov_entry45_hit_cnt;
output reg  [15:0]  ov_entry46_hit_cnt;
output reg  [15:0]  ov_entry47_hit_cnt;
output reg  [15:0]  ov_entry48_hit_cnt;
output reg  [15:0]  ov_entry49_hit_cnt;
output reg  [15:0]  ov_entry50_hit_cnt;
output reg  [15:0]  ov_entry51_hit_cnt;
output reg  [15:0]  ov_entry52_hit_cnt;
output reg  [15:0]  ov_entry53_hit_cnt;
output reg  [15:0]  ov_entry54_hit_cnt;
output reg  [15:0]  ov_entry55_hit_cnt;
output reg  [15:0]  ov_entry56_hit_cnt;
output reg  [15:0]  ov_entry57_hit_cnt;
output reg  [15:0]  ov_entry58_hit_cnt;
output reg  [15:0]  ov_entry59_hit_cnt;
output reg  [15:0]  ov_entry60_hit_cnt;
output reg  [15:0]  ov_entry61_hit_cnt;
output reg  [15:0]  ov_entry62_hit_cnt;
output reg  [15:0]  ov_entry63_hit_cnt;

//***************************************************
//          lookup dmac forward table
//***************************************************
// internal reg&wire for state machine
reg                 r_dmac_hit;
reg         [32:0]  rv_dmac_hit_outport; 
reg                 r_smac_hit;
reg         [5:0]   rv_hit_entry_addr;

reg         [63:0]   rv_entries_hit;

reg         [3:0]   dlu_state;
localparam  IDLE_S                = 4'd0,
            WAIT_FIRST_S          = 4'd1,
            WAIT_SECOND_S         = 4'd2,
            LOOKUP_DMAC_TABLE_S   = 4'd3,
            RECEIVE_TSMP_RESULT_S = 4'd4,
            OUTPUT_TSMP_MD_S      = 4'd5,
            OUTPORT_ETH_MD_S      = 4'd6,
            NOT_LOOKUP_TABLE_S    = 4'd7;
always @(posedge i_clk or negedge i_rst_n)begin
    if(!i_rst_n)begin
        ov_tsmp_lookup_table_key   <= 48'd0;
        o_tsmp_lookup_table_key_wr <= 1'b0;        
        ov_dmacram_raddr           <= 6'd0;
        o_dmacram_rd               <= 1'b0;                                   
		o_fifo_rd                  <= 1'b0;                            
        ov_md                      <= 300'b0;
		o_md_wr                    <= 1'b0;
        r_dmac_hit                 <= 1'b0;
        rv_dmac_hit_outport        <= 33'b0;
        r_smac_hit                 <= 1'b0;
        rv_hit_entry_addr          <= 6'b0;
        rv_entries_hit             <= 64'b0;
        
        dlu_state                  <= IDLE_S;
    end
    else begin
        case(dlu_state)
            IDLE_S:begin
                r_dmac_hit                 <= 1'b0;
                rv_dmac_hit_outport        <= 33'b0;
                r_smac_hit                 <= 1'b0;               
                rv_hit_entry_addr          <= 6'b0;
                rv_entries_hit             <= 64'b0;
                if(!i_fifo_empty)begin
					if((iv_fifo_rdata[111:96] != 16'h8100)&&(iv_fifo_rdata[298:295] != 4'b1110))begin//need to lookup dmac table.
                        if((iv_fifo_rdata[111:96] == 16'hff01)&&(iv_fifo_rdata[47:24] == 24'h662662))begin//tsmp packet
                            ov_tsmp_lookup_table_key   <= iv_fifo_rdata[47:0];//dmac address
                            o_tsmp_lookup_table_key_wr <= 1'b1;
                            ov_dmacram_raddr           <= 6'd0;
                            o_dmacram_rd               <= 1'b0;                                                       
                            o_fifo_rd                  <= 1'b0;                                                      
                            ov_md                      <= 300'b0;
                            o_md_wr                    <= 1'b0;
                            dlu_state                  <= RECEIVE_TSMP_RESULT_S;                                
                        end
                        else begin// not tsmp packet.                        
                            ov_tsmp_lookup_table_key   <= 48'b0;
                            o_tsmp_lookup_table_key_wr <= 1'b0;
                            ov_dmacram_raddr           <= 6'd0;
                            o_dmacram_rd               <= 1'b1;                          
                            o_fifo_rd                  <= 1'b0;                                                     
                            ov_md                      <= 300'b0;
                            o_md_wr                    <= 1'b0;
                            dlu_state                  <= WAIT_FIRST_S;
                        end
                    end
                    else begin//not need to lookup table
                        ov_tsmp_lookup_table_key   <= 48'd0;
                        o_tsmp_lookup_table_key_wr <= 1'b0;                       
                        ov_dmacram_raddr           <= 6'd0;
                        o_dmacram_rd               <= 1'b0;                                                           
                        o_fifo_rd                  <= 1'b1;                                                  
                        ov_md                      <= 300'b0;
                        o_md_wr                    <= 1'b0;
                        dlu_state                  <= NOT_LOOKUP_TABLE_S;               
                    end
                end
                else begin
                    ov_tsmp_lookup_table_key   <= 48'd0;
                    o_tsmp_lookup_table_key_wr <= 1'b0;                    
                    ov_dmacram_raddr           <= 6'd0;
                    o_dmacram_rd               <= 1'b0;                                                       
                    o_fifo_rd                  <= 1'b0;                                             
                    ov_md                      <= 300'b0;
                    o_md_wr                    <= 1'b0;
                    dlu_state                  <= IDLE_S;                 
                end
            end
            WAIT_FIRST_S:begin//get data of reading ram after 2 cycles. 
                ov_tsmp_lookup_table_key       <= 48'd0;
                o_tsmp_lookup_table_key_wr     <= 1'b0;                
                o_dmacram_rd                   <= 1'b1;
                ov_dmacram_raddr               <= ov_dmacram_raddr + 1'b1;             
                o_fifo_rd                      <= 1'b0;                
                dlu_state                      <= WAIT_SECOND_S;
			end
			WAIT_SECOND_S:begin 
                ov_tsmp_lookup_table_key       <= 48'd0;
                o_tsmp_lookup_table_key_wr     <= 1'b0;               
                o_dmacram_rd                   <= 1'b1;
                ov_dmacram_raddr               <= ov_dmacram_raddr + 1'b1;              
                o_fifo_rd                      <= 1'b0;                
                dlu_state                      <= LOOKUP_DMAC_TABLE_S;
			end
			LOOKUP_DMAC_TABLE_S:begin
				if(iv_dmacram_rdata[81] == 1'b1)begin//table entry is valid
                    if(iv_dmacram_rdata[47:0] == iv_fifo_rdata[47:0])begin//dmac compare.
                        r_dmac_hit             <= 1'b1;
                        rv_dmac_hit_outport    <= iv_dmacram_rdata[80:48]; 
                        rv_hit_entry_addr      <= ov_dmacram_raddr - 6'd2;                        
                    end
                    else begin
                        r_dmac_hit             <= r_dmac_hit;
                        rv_dmac_hit_outport    <= rv_dmac_hit_outport;                      
                    end

                    if((iv_dmacram_rdata[47:0] == iv_fifo_rdata[95:48]) && (iv_dmacram_rdata[80:48] == (33'b1 << iv_fifo_rdata[154:149])))begin//smac and port compare.
                        r_smac_hit             <= 1'b1;                 
                    end
                    else begin
                        r_smac_hit             <= r_smac_hit;                   
                    end
                    
                    if(r_dmac_hit && r_smac_hit)begin
                        o_dmacram_rd     <= 1'b0;
                        ov_dmacram_raddr <= 6'b0; 
                        o_fifo_rd        <= 1'b1;                        
                        dlu_state        <= OUTPORT_ETH_MD_S;                          
                    end
                    else if(ov_dmacram_raddr == 6'h01)begin//not match all entries.
                        o_dmacram_rd     <= 1'b0;
                        ov_dmacram_raddr <= 6'b0;
                        o_fifo_rd        <= 1'b1; 
                        dlu_state        <= OUTPORT_ETH_MD_S;                          
                    end
                    else begin
                        o_dmacram_rd     <= 1'b1;
                        ov_dmacram_raddr <= ov_dmacram_raddr + 1'b1;                      
                        dlu_state        <= LOOKUP_DMAC_TABLE_S;                        
                    end
                end
                else begin
                    o_dmacram_rd     <= 1'b0;
                    ov_dmacram_raddr <= 6'b0;
                    o_fifo_rd        <= 1'b1;                     
                    dlu_state        <= OUTPORT_ETH_MD_S;                        
                end			
			end
            OUTPORT_ETH_MD_S:begin
                ov_dmacram_raddr           <= 6'd0;
                o_dmacram_rd               <= 1'b0;                                                 
                o_fifo_rd                  <= 1'b0;
                dlu_state                  <= IDLE_S;
                if(!r_dmac_hit)begin
                    rv_entries_hit <= (64'd1 << rv_hit_entry_addr);
                end
                else begin
                    rv_entries_hit <= 64'b0;
                end
                
                if(r_dmac_hit && r_smac_hit)begin
                    ov_md[299:200]         <= iv_fifo_rdata[299:200];                 
                    ov_md[198:166]         <= rv_dmac_hit_outport;//outport
                    ov_md[165:156]         <= iv_fifo_rdata[165:156]; 
                    ov_md[155]             <= 1'b1;//BE_Match                                        
                    ov_md[154:0]           <= iv_fifo_rdata[154:0];  
                    if(rv_dmac_hit_outport == 33'b0)begin
                        ov_md[199]         <= 1'b1;
                    end
                    else begin
                        ov_md[199]         <= ov_md[199];
                    end
                    o_md_wr                <= 1'b1; 
                end
                else if(r_dmac_hit && (!r_smac_hit))begin
                    ov_md[299:199]         <= iv_fifo_rdata[299:199]; 
                    ov_md[199]         <= iv_fifo_rdata[199];                      
                    ov_md[198:166]         <= {1'b1,rv_dmac_hit_outport[31:0]};//outport
                    ov_md[165:156]         <= iv_fifo_rdata[165:156]; 
                    ov_md[155]             <= 1'b1;//BE_Match                   
                    ov_md[154:0]           <= iv_fifo_rdata[154:0];                     
                    o_md_wr                <= 1'b1; 
                end
                else begin//r_dmac_hit == 1'b0.
                    ov_md[299:199]         <= iv_fifo_rdata[299:199];
                    ov_md[199]         <= iv_fifo_rdata[199];                    
                    ov_md[165:156]         <= iv_fifo_rdata[165:156]; 
                    ov_md[155]             <= 1'b0;//BE_Match
                    ov_md[154:0]           <= iv_fifo_rdata[154:0]; 
                    if(r_smac_hit)begin
                        ov_md[198:166]     <= ((~{33'd1 << iv_fifo_rdata[154:149]}) & iv_broadcast_storm_prevent_outport) & 33'h0_ffff_ffff;//broadcast except hcp_port , inport and loopback_port.
                    end
                    else begin
                        ov_md[198:166]     <= ((~{33'd1 << iv_fifo_rdata[154:149]}) & iv_broadcast_storm_prevent_outport);//broadcast except inport and loopback_port.
                    end
                    o_md_wr                <= 1'b1; 
                end                
            end
            RECEIVE_TSMP_RESULT_S:begin
                ov_tsmp_lookup_table_key   <= 48'b0;
                o_tsmp_lookup_table_key_wr <= 1'b0;            
                if(i_tsmp_lookup_table_outport_wr)begin
                    o_fifo_rd              <= 1'b1;
                    ov_md[299:200]         <= iv_fifo_rdata[299:200];                 
                    ov_md[198:166]         <= iv_tsmp_lookup_table_outport;//{iv_tsmp_lookup_table_outport[32],iv_tsmp_lookup_table_outport[7:0]};//outport
                    ov_md[165:156]         <= iv_fifo_rdata[165:156]; 
                    ov_md[155]             <= 1'b1;//BE_Match
                    ov_md[154:0]           <= iv_fifo_rdata[154:0];  
                    o_md_wr                <= 1'b0;
                    //if({iv_tsmp_lookup_table_outport[32],iv_tsmp_lookup_table_outport[7:0]} == 9'b0)begin
                    if(iv_tsmp_lookup_table_outport == 33'b0)begin
                        ov_md[199]             <= 1'b1;
                    end
                    else begin
                        ov_md[199]             <= ov_md[199];
                    end                 
                    dlu_state                  <= OUTPUT_TSMP_MD_S;                
                end
                else begin
                    dlu_state <= RECEIVE_TSMP_RESULT_S;
                end
            end
            OUTPUT_TSMP_MD_S:begin
                ov_tsmp_lookup_table_key   <= 48'd0;
                o_tsmp_lookup_table_key_wr <= 1'b0;                                             
                o_fifo_rd                  <= 1'b0;                                         
                ov_md                      <= ov_md;
                o_md_wr                    <= 1'b1;                
                dlu_state                  <= IDLE_S; 
            end
            NOT_LOOKUP_TABLE_S:begin
                ov_tsmp_lookup_table_key   <= 48'd0;
                o_tsmp_lookup_table_key_wr <= 1'b0;              
                ov_dmacram_raddr           <= 6'd0;
                o_dmacram_rd               <= 1'b0;                                                 
                o_fifo_rd                  <= 1'b0;                                         
                ov_md                      <= iv_fifo_rdata;
                o_md_wr                    <= 1'b1;              
                dlu_state                  <= IDLE_S; 
            end
            default:begin
                ov_tsmp_lookup_table_key   <= 48'd0;
                o_tsmp_lookup_table_key_wr <= 1'b0;              
                ov_dmacram_raddr           <= 6'd0;
                o_dmacram_rd               <= 1'b0;                                                 
                o_fifo_rd                  <= 1'b0;                                          
                ov_md                      <= 300'b0;
                o_md_wr                    <= 1'b0;

                dlu_state                  <= IDLE_S;             
            end
        endcase
    end
end

always @(posedge i_clk or negedge i_rst_n)begin
    if(!i_rst_n)begin        
        ov_entry0_hit_cnt          <= 16'b0;
        ov_entry1_hit_cnt          <= 16'b0;
        ov_entry2_hit_cnt          <= 16'b0;
        ov_entry3_hit_cnt          <= 16'b0;
        ov_entry4_hit_cnt          <= 16'b0;
        ov_entry5_hit_cnt          <= 16'b0;
        ov_entry6_hit_cnt          <= 16'b0;
        ov_entry7_hit_cnt          <= 16'b0;
        ov_entry8_hit_cnt          <= 16'b0;
        ov_entry9_hit_cnt          <= 16'b0;
        ov_entry10_hit_cnt          <= 16'b0;
        ov_entry11_hit_cnt          <= 16'b0;
        ov_entry12_hit_cnt          <= 16'b0;
        ov_entry13_hit_cnt          <= 16'b0;
        ov_entry14_hit_cnt          <= 16'b0;
        ov_entry15_hit_cnt          <= 16'b0;
        ov_entry16_hit_cnt          <= 16'b0;
        ov_entry17_hit_cnt          <= 16'b0;
        ov_entry18_hit_cnt          <= 16'b0;
        ov_entry19_hit_cnt          <= 16'b0;
        ov_entry20_hit_cnt          <= 16'b0;
        ov_entry21_hit_cnt          <= 16'b0;
        ov_entry22_hit_cnt          <= 16'b0;
        ov_entry23_hit_cnt          <= 16'b0;
        ov_entry24_hit_cnt          <= 16'b0;
        ov_entry25_hit_cnt          <= 16'b0;
        ov_entry26_hit_cnt          <= 16'b0;
        ov_entry27_hit_cnt          <= 16'b0;
        ov_entry28_hit_cnt          <= 16'b0;
        ov_entry29_hit_cnt          <= 16'b0;
        ov_entry30_hit_cnt          <= 16'b0;
        ov_entry31_hit_cnt          <= 16'b0;
        ov_entry32_hit_cnt          <= 16'b0;
        ov_entry33_hit_cnt          <= 16'b0;
        ov_entry34_hit_cnt          <= 16'b0;
        ov_entry35_hit_cnt          <= 16'b0;
        ov_entry36_hit_cnt          <= 16'b0;
        ov_entry37_hit_cnt          <= 16'b0;
        ov_entry38_hit_cnt          <= 16'b0;
        ov_entry39_hit_cnt          <= 16'b0;  
        ov_entry40_hit_cnt          <= 16'b0;
        ov_entry41_hit_cnt          <= 16'b0;
        ov_entry42_hit_cnt          <= 16'b0;
        ov_entry43_hit_cnt          <= 16'b0;
        ov_entry44_hit_cnt          <= 16'b0;
        ov_entry45_hit_cnt          <= 16'b0;
        ov_entry46_hit_cnt          <= 16'b0;
        ov_entry47_hit_cnt          <= 16'b0;
        ov_entry48_hit_cnt          <= 16'b0;
        ov_entry49_hit_cnt          <= 16'b0;
        ov_entry50_hit_cnt          <= 16'b0;
        ov_entry51_hit_cnt          <= 16'b0;
        ov_entry52_hit_cnt          <= 16'b0;
        ov_entry53_hit_cnt          <= 16'b0;
        ov_entry54_hit_cnt          <= 16'b0;
        ov_entry55_hit_cnt          <= 16'b0;
        ov_entry56_hit_cnt          <= 16'b0;
        ov_entry57_hit_cnt          <= 16'b0;
        ov_entry58_hit_cnt          <= 16'b0;
        ov_entry59_hit_cnt          <= 16'b0; 
        ov_entry60_hit_cnt          <= 16'b0;
        ov_entry61_hit_cnt          <= 16'b0;
        ov_entry62_hit_cnt          <= 16'b0;
        ov_entry63_hit_cnt          <= 16'b0;        
    end
    else begin
        if(!i_hit_cnt_clr)begin
            ov_entry0_hit_cnt  <= ov_entry0_hit_cnt + rv_entries_hit[0];
            ov_entry1_hit_cnt  <= ov_entry1_hit_cnt + rv_entries_hit[1];
            ov_entry2_hit_cnt  <= ov_entry2_hit_cnt + rv_entries_hit[2];
            ov_entry3_hit_cnt  <= ov_entry3_hit_cnt + rv_entries_hit[3];
            ov_entry4_hit_cnt  <= ov_entry4_hit_cnt + rv_entries_hit[4];
            ov_entry5_hit_cnt  <= ov_entry5_hit_cnt + rv_entries_hit[5];
            ov_entry6_hit_cnt  <= ov_entry6_hit_cnt + rv_entries_hit[6];
            ov_entry7_hit_cnt  <= ov_entry7_hit_cnt + rv_entries_hit[7];
            ov_entry8_hit_cnt  <= ov_entry8_hit_cnt + rv_entries_hit[8];
            ov_entry9_hit_cnt  <= ov_entry9_hit_cnt + rv_entries_hit[9];
            ov_entry10_hit_cnt  <= ov_entry10_hit_cnt + rv_entries_hit[10];
            ov_entry11_hit_cnt  <= ov_entry11_hit_cnt + rv_entries_hit[11];
            ov_entry12_hit_cnt  <= ov_entry12_hit_cnt + rv_entries_hit[12];
            ov_entry13_hit_cnt  <= ov_entry13_hit_cnt + rv_entries_hit[13];
            ov_entry14_hit_cnt  <= ov_entry14_hit_cnt + rv_entries_hit[14];
            ov_entry15_hit_cnt  <= ov_entry15_hit_cnt + rv_entries_hit[15];
            ov_entry16_hit_cnt  <= ov_entry16_hit_cnt + rv_entries_hit[16];
            ov_entry17_hit_cnt  <= ov_entry17_hit_cnt + rv_entries_hit[17];
            ov_entry18_hit_cnt  <= ov_entry18_hit_cnt + rv_entries_hit[18];
            ov_entry19_hit_cnt  <= ov_entry19_hit_cnt + rv_entries_hit[19];
            ov_entry20_hit_cnt  <= ov_entry20_hit_cnt + rv_entries_hit[20];
            ov_entry21_hit_cnt  <= ov_entry21_hit_cnt + rv_entries_hit[21];
            ov_entry22_hit_cnt  <= ov_entry22_hit_cnt + rv_entries_hit[22];
            ov_entry23_hit_cnt  <= ov_entry23_hit_cnt + rv_entries_hit[23];
            ov_entry24_hit_cnt  <= ov_entry24_hit_cnt + rv_entries_hit[24];
            ov_entry25_hit_cnt  <= ov_entry25_hit_cnt + rv_entries_hit[25];
            ov_entry26_hit_cnt  <= ov_entry26_hit_cnt + rv_entries_hit[26];
            ov_entry27_hit_cnt  <= ov_entry27_hit_cnt + rv_entries_hit[27];
            ov_entry28_hit_cnt  <= ov_entry28_hit_cnt + rv_entries_hit[28];
            ov_entry29_hit_cnt  <= ov_entry29_hit_cnt + rv_entries_hit[29];
            ov_entry30_hit_cnt  <= ov_entry30_hit_cnt + rv_entries_hit[30];
            ov_entry31_hit_cnt  <= ov_entry31_hit_cnt + rv_entries_hit[31];
            ov_entry32_hit_cnt  <= ov_entry32_hit_cnt + rv_entries_hit[32];
            ov_entry33_hit_cnt  <= ov_entry33_hit_cnt + rv_entries_hit[33];
            ov_entry34_hit_cnt  <= ov_entry34_hit_cnt + rv_entries_hit[34];
            ov_entry35_hit_cnt  <= ov_entry35_hit_cnt + rv_entries_hit[35];
            ov_entry36_hit_cnt  <= ov_entry36_hit_cnt + rv_entries_hit[36];
            ov_entry37_hit_cnt  <= ov_entry37_hit_cnt + rv_entries_hit[37];
            ov_entry38_hit_cnt  <= ov_entry38_hit_cnt + rv_entries_hit[38];
            ov_entry39_hit_cnt  <= ov_entry39_hit_cnt + rv_entries_hit[39];
            ov_entry40_hit_cnt  <= ov_entry40_hit_cnt + rv_entries_hit[40];
            ov_entry41_hit_cnt  <= ov_entry41_hit_cnt + rv_entries_hit[41];
            ov_entry42_hit_cnt  <= ov_entry42_hit_cnt + rv_entries_hit[42];
            ov_entry43_hit_cnt  <= ov_entry43_hit_cnt + rv_entries_hit[43];
            ov_entry44_hit_cnt  <= ov_entry44_hit_cnt + rv_entries_hit[44];
            ov_entry45_hit_cnt  <= ov_entry45_hit_cnt + rv_entries_hit[45];
            ov_entry46_hit_cnt  <= ov_entry46_hit_cnt + rv_entries_hit[46];
            ov_entry47_hit_cnt  <= ov_entry47_hit_cnt + rv_entries_hit[47];
            ov_entry48_hit_cnt  <= ov_entry48_hit_cnt + rv_entries_hit[48];
            ov_entry49_hit_cnt  <= ov_entry49_hit_cnt + rv_entries_hit[49];
            ov_entry50_hit_cnt  <= ov_entry50_hit_cnt + rv_entries_hit[50];
            ov_entry51_hit_cnt  <= ov_entry51_hit_cnt + rv_entries_hit[51];
            ov_entry52_hit_cnt  <= ov_entry52_hit_cnt + rv_entries_hit[52];
            ov_entry53_hit_cnt  <= ov_entry53_hit_cnt + rv_entries_hit[53];
            ov_entry54_hit_cnt  <= ov_entry54_hit_cnt + rv_entries_hit[54];
            ov_entry55_hit_cnt  <= ov_entry55_hit_cnt + rv_entries_hit[55];
            ov_entry56_hit_cnt  <= ov_entry56_hit_cnt + rv_entries_hit[56];
            ov_entry57_hit_cnt  <= ov_entry57_hit_cnt + rv_entries_hit[57];
            ov_entry58_hit_cnt  <= ov_entry58_hit_cnt + rv_entries_hit[58];
            ov_entry59_hit_cnt  <= ov_entry59_hit_cnt + rv_entries_hit[59];
            ov_entry60_hit_cnt  <= ov_entry60_hit_cnt + rv_entries_hit[60];
            ov_entry61_hit_cnt  <= ov_entry61_hit_cnt + rv_entries_hit[61];
            ov_entry62_hit_cnt  <= ov_entry62_hit_cnt + rv_entries_hit[62];
            ov_entry63_hit_cnt  <= ov_entry63_hit_cnt + rv_entries_hit[63];       
        end
        else begin
            ov_entry0_hit_cnt    <= 16'b0;
            ov_entry1_hit_cnt    <= 16'b0;
            ov_entry2_hit_cnt    <= 16'b0;
            ov_entry3_hit_cnt    <= 16'b0;
            ov_entry4_hit_cnt    <= 16'b0;
            ov_entry5_hit_cnt    <= 16'b0;
            ov_entry6_hit_cnt    <= 16'b0;
            ov_entry7_hit_cnt    <= 16'b0; 
            ov_entry8_hit_cnt    <= 16'b0;
            ov_entry9_hit_cnt    <= 16'b0;
            ov_entry10_hit_cnt   <= 16'b0;
            ov_entry11_hit_cnt   <= 16'b0;
            ov_entry12_hit_cnt   <= 16'b0;
            ov_entry13_hit_cnt   <= 16'b0;
            ov_entry14_hit_cnt   <= 16'b0;
            ov_entry15_hit_cnt   <= 16'b0;
            ov_entry16_hit_cnt   <= 16'b0;
            ov_entry17_hit_cnt   <= 16'b0;
            ov_entry18_hit_cnt   <= 16'b0;
            ov_entry19_hit_cnt   <= 16'b0;
            ov_entry20_hit_cnt   <= 16'b0;
            ov_entry21_hit_cnt   <= 16'b0;
            ov_entry22_hit_cnt   <= 16'b0;
            ov_entry23_hit_cnt   <= 16'b0;
            ov_entry24_hit_cnt   <= 16'b0;
            ov_entry25_hit_cnt   <= 16'b0;
            ov_entry26_hit_cnt   <= 16'b0;
            ov_entry27_hit_cnt   <= 16'b0;
            ov_entry28_hit_cnt   <= 16'b0;
            ov_entry29_hit_cnt   <= 16'b0;
            ov_entry30_hit_cnt   <= 16'b0;
            ov_entry31_hit_cnt   <= 16'b0;
            ov_entry32_hit_cnt   <= 16'b0;
            ov_entry33_hit_cnt   <= 16'b0;
            ov_entry34_hit_cnt   <= 16'b0;
            ov_entry35_hit_cnt   <= 16'b0;
            ov_entry36_hit_cnt   <= 16'b0;
            ov_entry37_hit_cnt   <= 16'b0;
            ov_entry38_hit_cnt   <= 16'b0;
            ov_entry39_hit_cnt   <= 16'b0;  
            ov_entry40_hit_cnt   <= 16'b0;
            ov_entry41_hit_cnt   <= 16'b0;
            ov_entry42_hit_cnt   <= 16'b0;
            ov_entry43_hit_cnt   <= 16'b0;
            ov_entry44_hit_cnt   <= 16'b0;
            ov_entry45_hit_cnt   <= 16'b0;
            ov_entry46_hit_cnt   <= 16'b0;
            ov_entry47_hit_cnt   <= 16'b0;
            ov_entry48_hit_cnt   <= 16'b0;
            ov_entry49_hit_cnt   <= 16'b0;
            ov_entry50_hit_cnt   <= 16'b0;
            ov_entry51_hit_cnt   <= 16'b0;
            ov_entry52_hit_cnt   <= 16'b0;
            ov_entry53_hit_cnt   <= 16'b0;
            ov_entry54_hit_cnt   <= 16'b0;
            ov_entry55_hit_cnt   <= 16'b0;
            ov_entry56_hit_cnt   <= 16'b0;
            ov_entry57_hit_cnt   <= 16'b0;
            ov_entry58_hit_cnt   <= 16'b0;
            ov_entry59_hit_cnt   <= 16'b0; 
            ov_entry60_hit_cnt   <= 16'b0;
            ov_entry61_hit_cnt   <= 16'b0;
            ov_entry62_hit_cnt   <= 16'b0;
            ov_entry63_hit_cnt   <= 16'b0;              
        end
    end
end
endmodule           
